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China Speeds Up Advanced Chip Development

Chinese Foxconn workers check integrated circuit boards in a workshop at the Shenzhen plant of Foxconn Technology Group in Shenzhen city, ...

Chinese Foxconn workers check integrated circuit boards in a workshop at the Shenzhen plant of Foxconn Technology Group in Shenzhen city, south China
China is accelerating the efforts to advance its domestic semiconductor industry, amid ongoing trade tensions with the West, in hopes of becoming more self-sufficient. The country is stepping up the microchip technology and it making a steadily noticeable progress.

Recently, China entered the 14nm finFET market, with 7nm chip in R&D. China also is expanding into memory. And in the fab equipment sector, China is developing its own extreme ultraviolet (EUV) lithography system, which is a technology that patterns the most advanced features in chips.  And for that matter, the nation’s foundry and memory efforts are modest, at least for now. And China won’t overtake multinational chipmakers anytime soon.

Nonetheless, it is developing its domestic IC industry for several reasons. For one thing, China imports most of its chips from foreign suppliers, creating an enormous trade gap. China has a sizeable IC industry, but it isn’t large enough to close the gap. In response, the nation is pouring billions of dollars into its IC sector with plans to manufacture more of its own chips. Simply put, it wants to become less dependent on foreign suppliers.

China recently accelerated those efforts, especially when the U.S. launched a multi-prong trade war with the nation. In just one example, the U.S. has made it more difficult for Huawei to obtain U.S. chips and software. And recently, the U.S. blocked ASML from shipping an EUV scanner to SMIC, China’s largest foundry vendor. China sees these and other actions as a way to hamper its growth, prompting it to speed up the development of its own technologies.

Meanwhile, the U.S. says its trade-related actions are justified, claiming that China is engaged in unfair trade practices and has failed to protect U.S. intellectual-property. China dismisses those claims. Nonetheless, the industry needs to keep an eye on the trade issues as well as China’s progress in semiconductors. They include:
  • SMIC is shipping 14nm finFETs, with a 7nm-like process in R&D.
  • Yangtze Memory Technologies (YMTC) recently entered the 3D NAND market with a 64-layer device. A 128-layer technology is in R&D.
  • ChangXin Memory Technology (CXMT) is shipping its first product, a 19nm DRAM line.
  • China is expanding into compound semis, including gallium nitride (GaN) and silicon carbide (SiC).
  • China’s OSATs are developing more advanced packages.
This all sounds impressive, but China is still trailing. “China is spending like crazy. China’s strategy is to be a player in semiconductor manufacturing. It comes from wanting to have a bigger share of its domestic manufacturing capabilities, as well as for security considerations,” said Risto Puhakka, president of VLSI Research. “But China’s share in memory is small. On the logic side, they are behind TSMC. China is far from being self-sufficient from any reasonable aspect.”

Those aren’t the only issues. “There are still many challenges for China, including the need for more talent and IP in semiconductor manufacturing, and the need to further narrow the gap in the leading process technologies,” said Leo Pang, chief product officer at D2S. “The top challenge is the tension between the U.S. and Chinese governments, which is causing uncertainty in the supply of manufacturing equipment and EDA software.”

China’s strategy

China has been involved in the IC industry for decades. In the 1980s, it had several state-run chipmakers with outdated technology. So at the time, China introduced several initiatives to modernize its IC industry. With help from foreign concerns, the country launched several chip ventures in the 1980s and 1990s. Still, China found itself behind the West in semiconductor technology for several reasons. At the time, the West implemented strict export controls on China. Equipment vendors were prohibited from shipping the most advanced tools to China.

China becoming aggressive in microchip production / semiengineering.com
Then in 2000, China launched two new and modern domestic foundry vendors — Grace and SMIC. By then the export controls were relaxed in China. Equipment vendors simply required a license to ship tools to China. Around that time, China became a large manufacturing base with low labor rates. Demand for chips skyrocketed. Over time, the nation became the world’s largest market for chips.

Starting in the late 2000s, multinational chipmakers began building fabs in China to gain access to the market. Intel, Samsung and SK Hynix built memory fabs in China. TSMC and UMC built foundry fabs there. By 2014, China consumed $77 billion worth of chips, according to IC Insights, but it imported most of them. Plus, China only manufactured 15.1% of those chips, according to IC Insights. The rest were manufactured outside of China.

In response, and armed with billions of dollars in funding, the Chinese government unveiled a new plan in 2014. The goal was to accelerate China’s efforts in 14nm finFETs, memory and packaging.
Then, in 2015, China launched another initiative, dubbed “Made in China 2025.” The goal is to increase the domestic content of components in 10 areas — IT, robotics, aerospace, shipping, railways, electric vehicles, power equipment, materials, medicine and machinery.

In addition, China hopes to become more self-sufficient in ICs and wants to increase its domestic production to 70% by 2025, according to IC Insights. In 2019, China consumed $125 billion worth of chips, according to IC Insights, but it still imports most of them. China only manufactured 15.7% of those chips, so it’s unlikely the country will reach its production targets by 2025.

Fig. 1: China’s IC market vs. production trends Source: IC Insights

China faces other challenges, as well, particularly a shortage of technical talent. “China is still seeking more talent in semiconductor manufacturing,” D2S’ Pang observed. “That is mainly because China is building a dozen new fabs. It has already recruited thousands, if not tens of thousands, of experienced semiconductor engineers from fabs in Taiwan, Korea, Japan and even the U.S. by paying them with very attractive compensation packages.”

On the bright side, China made a quick recovery from the Covid-19 pandemic earlier this year. In the first half of 2020, chip and equipment demand were strong in China and elsewhere. “200mm capacity has continued to be running full with a wide range of end applications. In the 300mm area, this has been a similar situation over this past year,” said Walter Ng, vice president of business development at UMC.

Others see similar trends. “China semiconductor test and packaging markets have been resilient throughout the Covid-19 period,” said Amy Leong, senior vice president at FormFactor. “The demand remains solid, fueled by the combination of the momentum built over the last few years from the ‘Made in China 2025’ initiative, and the recent ‘panic build/buy’ amid China-U.S. tensions. With this said, we are seeing an increasing level of demand uncertainties in China as the fear of a global economic recession mounts.”

The mood is also tense. Starting in 2018, the U.S. launched a trade war with China, slapping tariffs on Chinese-made goods. China has retaliated. The trade war is escalating. Last year, the U.S. added Huawei and its internal chip unit, HiSilicon, to the “entity list,” saying the companies pose as a security risk. To do business with Huawei, a U.S. company must obtain a license from the U.S. government. Many U.S. vendors have been denied, which impacts their bottom lines.

Then, earlier this year, the U.S. expanded the definition of a “military end user” in China. This is designed to prevent China’s military from obtaining any U.S. technology. In May, the U.S. moved to stem the flow of chips to Huawei from overseas fabs. “Going forward, an overseas fab must halt sales to Huawei if it meets the following three conditions: A) fab uses U.S. equipment or software to make chips; B) the chip is designed by Huawei; and C) the chipmaker has knowledge the item produced is destined for Huawei,” said Paul Gallant, an analyst with Cowen.

“(This requires) foreign chipmakers using U.S. equipment to get a license before selling chips to Huawei. But the language of the new rule may not actually ban such sales. On the upside, the new rule only covers chips actually designed by HiSilicon, not all chips made by overseas fabs being sold to Huawei.” At some point, TSMC may halt new orders to Huawei. It’s unclear how this will all play out. The rules are fuzzy and could change overnight.

Foundry, EUV efforts

Even before the trade war, China was in the midst of a major fab expansion program. In 2017 and 2018, China had 18 fabs under construction, according to SEMI’s “World Fab Forecast Report.” Eventually, these fabs were built. China currently has 3 fabs under construction, according to SEMI. “Two of those fabs are for foundry. One is 8-inch and another is 12-inch. There is another one for memory (12-inch). Still on the drawing board are 7 more,” said Christian Dieseldorff, an analyst at SEMI.

The foundry industry makes up a large percentage of China’s fab capacity. China’s foundry industry is split into two categories—domestic and multinational vendors. TSMC and UMC are among the multinationals. TSMC operates a 200mm fab in Shanghai. In 2018, TSMC began shipping 16nm finFETs in another fab in Nanjing. UMC is manufacturing chips in a 200mm fab in Suzhou. UMC also has a new 300mm foundry venture in Xiamen, which is shipping 40nm and 28nm.

Meanwhile, China’s domestic foundry vendors, such as ASMC, CS Micro and the Huahong Group, all focus on mature processes. On the leading edge, startup HSMC is developing 14nm and 7nm in R&D. SMIC, China’s most advanced foundry company, is the world’s fifth largest foundry vendor, behind TSMC, Samsung, GlobalFoundries and UMC, according to TrendForce.

Up until last year, SMIC’s most advanced process was a 28nm planar technology. In comparison, TSMC introduced 28nm a decade ago. Today, TSMC is ramping up 5nm with 3nm in R&D.
This is a sore spot for the Chinese government. Because China is behind, Chinese OEMs must obtain their most advanced chips from foreign suppliers. On the other hand, there isn’t a gap for mature processes in China. “The technology node gap is not an issue for most fabs, since the majority of chips used in IoT and automotive applications do not require leading-edge nodes,” D2S’ Pang said.

Nonetheless, SMIC is trying to develop advanced processes. In 2015, SMIC, Huawei, Imec and Qualcomm formed a joint R&D chip technology venture in China with plans to develop a 14nm finFET process. This is a big step. “Moving to finFETs at 14nm is not easy. Everybody struggled with it,” VLSI Research’s Puhakka said. “So did SMIC. It’s difficult what they are trying to do.”
Still, that move is essential to continue scaling. At 20nm, traditional planar transistors run out of steam. This is why in 2011 Intel moved to finFET transistors at 22nm. FinFETs are faster with lower power than planar transistors, but they are also harder and more expensive to manufacture.

Later, GlobalFoundries, Samsung, TSMC and UMC moved to finFETs at 16nm/14nm. (Intel’s 22nm process is roughly equivalent to 16nm/14nm from the foundries.) Finally, after years of R&D, SMIC in 2019 reached a milestone by shipping China’s first 14nm finFETs. Today, 14nm represents a tiny percentage of SMIC’s sales. “Our customers’ feedback on 14nm is positive. Our 14nm is covering both communications and automotive sectors with applications including low-end application processors, baseband and consumer-related products,” said Zhao Haijun and Liang Mong Song, SMIC’s co-CEOs, in a conference call.

Still, SMIC is late to the party. For example, the application processor is the most advanced chip in a smartphone. Today’s smartphones incorporate application processors based on 7nm. Most other chips in smartphones, such as image sensors and RF, are based on mature nodes. And 14nm isn’t cost-competitive for the most advanced application processors. “SMIC is starting to do 14nm. But if you look at smartphones, the designs are at 7nm,” said Handel Jones, chief executive of IBS. “If you look at the transistor costs at 7nm, a billion transistors cost from $2.67 to $2.68. A billion transistors at 14nm cost about $3.88. So you have a big cost difference.”

14nm is viable in other markets, though. “14nm technology can be used for low-end 4G and 5G smartphones, but not for mainstream or high-end smartphones. 14nm can be used for 5G infrastructure applications with the appropriate processor and system architectures,” Jones said.
Now, with funding from the government, SMIC is developing 12nm finFETs and what it calls “N+1.” 12nm is a scaled down version of 14nm. Slated by year’s end, N+1 is billed as a 7nm technology.
N+1 isn’t quite what it seems. “SMIC’s N+1 is equivalent to Samsung’s 8nm, which is slightly better than TSMC’s 10nm,” said Samuel Wang, an analyst at Gartner. “SMIC’s N+1 is unlikely for this year. 12nm may become production ready by the end of 2020.”
Once again, SMIC may miss the market window.

By the time it ships 8nm in 2021, smartphone OEMs will move to 5nm for the application processor.
That’s not the only issue. SMIC could manufacture 8nm or 7nm using existing fab equipment. Beyond that, the current lithography equipment runs out of steam. So beyond 7nm, chipmakers require EUV, a next-generation lithography technology.

However, the U.S. recently blocked ASML from shipping its EUV scanners to SMIC. If SMIC can’t obtain EUV, the company is stuck at 8nm/7nm. “The U.S. blocked the EUV sale to SMIC (last year) under the Wassenaar agreement. I can’t envision a EUV shipment to China in the foreseeable future. But with 14nm just over 1% of SMIC’s sales, they don’t need EUV technology for a few years,” said Krish Sankar, an analyst at Cowen and Co.

At some point, though, China wants to go beyond 7nm. This is why China is working on its own EUV technology. China hasn’t developed a full-blown EUV scanner—it may never develop one. But work is underway in the arena. The EUV subsystems are being developed at several research institutes. For example, the Shanghai Institute of Optics and Fine Mechanics of the Chinese Academy of Sciences (CAS) last year described the development of EUV driven by a kilowatt laser.

In 2020, researchers from the Institute of Microelectronics of the CAS published a paper on “EUV multilayer defect characterization via cycle-consistent learning.” “There is a lot of research being done around different components of EUV,” VLSI Research’s Puhakka said. “I don’t think they have advanced to have a manufacturable EUV tool. Developing its own EUV will be a long process. I won’t say never, but it’s a long and hard road.”

Others agreed. “I assume that we see only part of what China is doing. It’s like an iceberg, most is hidden from view. Their academicians publish papers on EUV technology, but the work that I have seen has been mostly theoretical. I assume that there is some underlying hardware,” said Harry Levinson, principal at HJL Lithography.

Memory, non-memory efforts

China, meanwhile, has a huge trade gap in memory, namely DRAM and NAND flash. DRAM is used for main memory in systems, while NAND is used for storage. China imports most of its memory. Intel, Samsung and SK Hynix operate memory fabs in China, which produce chips for both the domestic and international markets. To reduce its dependence here, China is developing its domestic memory industry. In 2016, YMTC emerged with plans to enter the 3D NAND business. And CXMT is currently ramping up China’s first home-grown DRAMs.

Both are competitive markets, especially NAND. 3D NAND is the successor to planar NAND flash memory. Unlike planar NAND, which is a 2D structure, 3D NAND resembles a vertical skyscraper in which horizontal layers of memory cells are stacked and then connected using tiny vertical channels.
3D NAND is quantified by the number of layers stacked in a device. As more layers are added, the bit density increases in systems. But the manufacturing challenges escalate as you add more layers.

“There are two big challenges in scaling 3D NAND,” said Rick Gottscho, executive vice president and CTO at Lam Research. “One is the stress in the films that builds up as you deposit more and more layers, which can warp the wafer and distort the patterns. Then, when you go double deck or triple deck, alignment becomes a bigger challenge.”

Meanwhile, YMTC appears to have overcome some of those challenges. Last year, YMTC shipped its first product–a 64-layer 3D NAND device. Now, YMTC is sampling a 128-layer 3D technology.
The company is behind. In comparison, multinational vendors are shipping 92-/96-layer 3D NAND devices. They are also ramping up 112-/128-layer products. Still, YMTC could become a factor, at least in China. YMTC’s chips are being incorporated in USB cards and SSDs from China-based companies. If Chinese OEMs adopt YMTC’s technology, “it could become a disruptive situation in NAND market share,” said Jeongdong Choe, an analyst with TechInsights.

To be sure, though, China has a long way to go in memory before it becomes a major competitor. “IC Insights remains extremely skeptical whether the country can develop a large competitive indigenous memory industry even over the next 10 years that comes anywhere close to meeting its memory IC needs,” said Bill McClean, president of IC Insights. The same is true for analog, logic, mixed-signal and RF. “It will take decades for Chinese companies to become competitive in the non-memory IC product segments,” McClean said.

Meanwhile, several China-based GaN and SiC vendors have emerged in China. They appear to be foundry vendors and materials suppliers, but clearly, China is behind in the arena. GaN is used for power semis and RF, while SiC is targeted for power devices. “The Chinese market represents a significant opportunity in the global power electronics industry, mainly in the automotive and consumer segments,” said Ahmed Ben Slimane, technology and market analyst at Yole Développement. “Driven by the electric-vehicle/hybrid-electric vehicle applications, SiC devices started to be adopted by leading Chinese car makers, such as BYD in its Han EV model.

In the power GaN industry, the Chinese smartphone OEMs, such as Xiaomi, Huawei, Oppo and Vivo have opted for GaN in fast charger technology. Driven by strong system makers in China, Chinese wafer and device players are certainly well-positioned in terms of cost-competitiveness and increasing quality given the current context of the U.S.-China conflict.”

This in turn is fueling the development of the ecosystem. “Following the emergence of wideband-gap semiconductors in the power electronics market, China is indeed pushing for innovative technologies and it has started building up its domestic value chain,” said Ezgi Dogmus, technology and market analyst at Yole Développement. “In the Chinese power SiC ecosystem, we see various players getting involved at wafer, epiwafer and device level.

This includes players such as Tankeblue and SICC in wafers, Epiworld and TYSiC in epiwafer and Sanan IC in the foundry businesses. Regarding the power GaN market, starting from 2019, we have witnessed entry of competitive GaN device manufacturers such as Innoscience and various system integrators in the domain of fast chargers.”

Packaging plans

China also has big plans in packaging. JCET is China’s largest packaging house. It has several other OSATs as well. “China’s OSAT technology is quite current to the mainstream industry capability, perceived as a much narrower technology gap compared to front-end wafer fabrication technology. They are capable of supporting nearly all popular package types,” FormFactor’s Leong said. “The emerging 2.5D/3D heterogeneous integration technology is still under development in China, noticeably behind the industry leaders like TSMC, Intel and Samsung.”

Potentially, though, advanced packaging is where China could close the gap. This is not just in packaging, but in semiconductor technology. Today, for advanced designs, the industry typically develops an ASIC using chip scaling. This is where you shrink different functions at each node and pack them onto a monolithic die. But this approach is becoming more expensive at each node.

The industry is looking for new approaches. Another way to develop a system-level design is to assemble complex dies in an advanced package. “As Moore’s Law slows down, heterogeneous integration with advanced packaging technology represents a once-in-a-lifetime opportunity for China to catch up in semiconductors,” Leong said